instruction memory造句
例句與造句
- The integrated FX8010 was a 32-bit programmable processor with 1 kilobyte of instruction memory.
- RISC architectures need more instruction memory and require a compiler to translate high-level languages to RISC assembly code.
- B3-34 used reverse Polish notation and had 98 bytes of instruction memory, four stack user registers and 14 addressable registers.
- The HEP memory consisted of completely separate instruction memory ( up to 128 MBs ) and data memory ( up to 1 GB ).
- Each processor, in addition to the PSW queue and instruction pipeline, contained instruction memory, 2, 048 64-bit general purpose registers and 4, 096 constant registers.
- It's difficult to find instruction memory in a sentence. 用instruction memory造句挺難的
- The "'Modified Harvard architecture "'is a variation of the Harvard computer architecture that allows the contents of the instruction memory to be accessed as if it were data.
- Another modification provides a pathway between the instruction memory ( such as ROM or flash memory ) and the CPU to allow words from the instruction memory to be treated as read-only data.
- Another modification provides a pathway between the instruction memory ( such as ROM or flash memory ) and the CPU to allow words from the instruction memory to be treated as read-only data.
- Special machine language instructions are provided to read data from the instruction memory . ( This is distinct from instructions which themselves embed constant data, although for individual constants the two mechanisms can substitute for each other .)
- The original TMS32010 and its subsequent variants is an example of a CPU with a modified Harvard architecture, which features separate address spaces for instruction and data memory but the ability to read data values from instruction memory.
- Despite very limited abilities ( 98 bytes of instruction memory and about 19 stack and addressable registers ), people managed to write all kinds of programs for them, including adventure games and libraries of calculus-related functions for engineers.
- I was trying to explain to Wtshymanski something that he did not understand-- that all 8-bit 40-pin microprocessors and microcontrollers without exception use a Von Neuman architecture because a Harvard or Modified Harvard architecture would require at least 50 pins ( 8 + 16 for instruction memory, 8 + 16 for data memory, and 2 for power and ground ).
- :: When writing code for small embedded processors ( or softcore CPUs on FPGAs ), it is common to have no room for the standard library in the instruction memory space ( try fitting malloc ( ) into 4 kilobits of . text memory ! ) If you ever have the ( mis ) fortune of working with one of these tiny processors, you will very quickly need to distinguish between language constructs and included libraries.